L-Edit/DRC(tm) is a design rule checker featuring a user programmable rule set. By using Boolean combinations of layers in design rule specifications, integrated circuit designers can verify their layout against the published geometric DRC constraints of a silicon foundry. Features include:
check large designs with time increasing only n*log(n) time
with design size.
operations.
surround rule types.
Phanesh Janapareddi
Sales Engineer Tanner Research, Inc. 180 N. Vinedo Avenue Pasadena, CA 91107 USA 818-792-3000 fax:818-792-0300 sales@tanner.com