Design Pro(tm) is an affordable and powerful CAE/CAD system for ASIC design. The package includes an easy to use schematic entry program, S-Edit(tm), a full chip circuit simulator, T-Spice(tm), a full custom layout editor, L-Edit(tm), an automatic placement and router, L-Edit/SPR(tm), a design rule checker, L-Edit/DRC(tm), a netlist extractor, L-Edit/Extract(tm), and a layout vs. schematic comparison program, LVS. The system supports EDIF, GDS-II and CIF file formats. Design Pro is an integrated product that provides the ASIC designer with a complete set of full featured design tools for standard cell and full custom chip design.
Phanesh Janapareddi
Sales Engineer Tanner Research, Inc. 180 N. Vinedo Avenue Pasadena, CA 91107 USA 818-792-3000 fax:818-792-0300 sales@tanner.com